Trace port width

Specifies the trace bus width, which can be set to 1, 2, 4, 8, or 16 bits. The value must correspond with what is supported by the hardware and the debug probe. For Cortex-M3, 1, 2, and 4 bits are supported by the J-Trace debug probe. For Arm7/9, only 4 bits are supported by the J-Trace debug probe.

For the lower values, the risk of FIFO buffer overflow increases, unless you are using the Stall processor on FIFO full option.

Trace port mode

Trace buffer size

Specify the size of the trace buffer. By default, the number of trace frames is 0xFFFF. For Arm7/9 the maximum number is 0xFFFFF, and for Cortex-M3 the maximum number is 0x3FFFFF.

For ARM7/9, one trace frame corresponds to 2 bytes of the physical J-Trace buffer size. For Cortex-M3, one trace frame corresponds to approximately 1 byte of the buffer size.

Cycle accurate tracing

Emits trace frames synchronous to the processor clock even when no trace data is available. This makes it possible to use the trace data for real-time timing calculations. However, if you select this option, the risk for FIFO buffer overflow increases.

Broadcast all branches

Makes the processor send more detailed address trace information. However, if you select this option, the risk for FIFO buffer overflow increases.

Stall processor on FIFO full

Stalls the processor in case the FIFO buffer fills up. The trace FIFO buffer on the CPU might in some situations become full—FIFO buffer overflow—which means trace data will be lost. This can be the case when the CPU is executing several branch instructions close to each other in time, such as in tight loops.

Show timestamp

Makes the Trace window display seconds instead of cycles in the Index column. To make this possible, you must also specify the appropriate speed for your CPU in the Trace port (CPU core) speed text box.