LDR (THUMB)
Syntax
LDR{condition} register,=expressionParameters
| An optional condition code if the instruction is placed after an |
| The register to load. |
| Any 32-bit expression. |
Description
Similar to the LDR (CODE16) instruction, but by using a 32-bit instruction, a larger value can be loaded directly with a MOV or MVN instruction without requiring the constant to be placed in a literal pool.
By specifying a 16-bit version explicitly with the LDR.N instruction, a 16-bit instruction is always generated. This may lead to the constant being placed in the literal pool, even though a 32-bit instruction could have loaded the value directly using MOV or MVN.
By specifying a 32-bit version explicitly with the LDR.W instruction, a 32-bit instruction is always generated.
If you do not specify either .N or .W, the 16-bit LDR (CODE16) instruction will be generated, unless Rd is R8-R15, which leads to the 32-bit variant being generated.
As for LDR (CODE16), the 16-bit variant can be translated into a MOVS instruction, which modifies the program status register.
Note
The syntax LDR{condition} register, expression2, as described for LDR (ARM) and LDR (CODE16), is no longer considered a pseudo-instruction. It is part of the normal instruction set as specified in the Unified Assembler syntax from Advanced RISC Machines Ltd.
Example
name thumbLdr
extern extLabel section MYCODE:CODE(2)
thumb
ldr r1,=extLabel ; Becomes "ldr r1,[pc,#8]":
nop ; loads extLabel from the
; literal pool.
ldr r2,label ; Becomes "ldr r2,[pc,#0]":
nop ; loads 0xFFEEDDCC into r2.
data
label dc32 0xFFEEDDCC
ltorg ; The literal pool is placed
; here.
endSee also
LDR (CODE16) if only 16-bit Thumb instructions are available.