Summary
In the following table, as well as in the following descriptions:
ARMdenotes pseudo-instructions available after theARMdirectiveCODE16* denotes pseudo-instructions available after theCODE16directiveTHUMBdenotes pseudo-instructions available after theTHUMBdirective.
The properties of THUMB pseudo-instructions depend on whether the used core has the Thumb-2 instruction set or not.
Note
In Thumb mode (and CODE16), the syntax LDR register, =expression can, for values from 0 to 255, be translated into a MOVS instruction. This instruction modifies the program status register.
This is a summary of the available pseudo-instructions for the A32 and T32 instruction sets:
Pseudo-instruction | Directive | Translated to | Description |
|---|---|---|---|
|
|
| Loads a program-relative address into a register. |
|
|
| Loads a program-relative address into a register. |
|
|
| Loads a program-relative address into a register. |
|
|
| Loads a program-relative address into a register. |
|
|
| Loads a program-relative address into a register. |
|
|
| Loads a register with any 32-bit expression. |
|
|
| Loads a register with any 32-bit expression. |
|
|
| Loads a register with any 32-bit expression. |
|
|
| Moves the value of a low register to another low register ( |
|
|
| Loads a register with any 32-bit value. |
|
|
| Generates the preferred Arm no-operation code. |
|
|
| Generates the preferred Thumb no-operation code. |
* Deprecated. Use THUMB instead.
This is a summary of the available pseudo-instructions for the A64 instruction set:
Pseudo-instruction | Translated to | Description |
|---|---|---|
|
| Loads a program-relative address into a register. |
|
| Loads a register with any 32-bit expression. |
|
| Loads a register with a 32-bit or 64-bit value. |