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IAR Embedded Workbench for RL78 5.20

--core

In this section:
Syntax
--core={s1|s2|s3}
Parameters

s1

Generates code for S1, the RL78 core with only one register bank and a multiplexed 8-bit bus.

s2

Generates code for S2, the core without instructions to support a hardware multiplier/divider.

s3 (default)

Generates code for S3, the core with instructions to support a hardware multiplier/divider.

Description

Use this option to select the processor core for which the code will be generated.

If you do not use the option to specify a core, the assembler generates code for the S3 core as default. Note that all modules of your application must use the same --core option.

This option also sets the value of the predefined symbol __CORE__, see Predefined symbols.

Caution

To set related options, select:

Project>Options>General Options>Target >Device