Skip to main content

IAR Embedded Workbench for RX 5.20

MISRAC2012-Rule-13.2_c

In this section:
Synopsis

(Required) The value of an expression and its persistent side effects shall be the same under all permitted evaluation orders

Enabled by default

Yes

Severity/Certainty

Medium/High

mediumhigh.png
Full description

There are multiple write accesses with volatile-qualified type within one and the same sequence point. This check is identical to SPC-volatile-writes, MISRAC2004-12.2_c, MISRAC++2008-5-0-1_c.

Coding standards
CERT EXP10-C

Do not depend on the order of evaluation of subexpressions or the order in which side effects take place

CERT EXP30-C

Do not depend on order of evaluation between sequence points

CWE 696

Incorrect Behavior Order

MISRA C:2004 12.2

(Required) The value of an expression shall be the same under any order of evaluation that the standard permits.

MISRA C:2012 Rule-13.2

(Required) The value of an expression and its persistent side effects shall be the same under all permitted evaluation orders

MISRA C++ 2008 5-0-1

(Required) The value of an expression shall be the same under any order of evaluation that the standard permits.

Code examples

The following code example fails the check and will give a warning:

void example(void) {
  int x;
  volatile int v, w;
  v = w = x;
}

The following code example passes the check and will not give a warning about this issue:

#include <stdbool.h>

void InitializeArray(int *);
const int *example(void)
{
  static volatile bool s_initialized = false;
  static int s_array[256];

  if (!s_initialized)
  {
    InitializeArray(s_array);
    s_initialized = true;
  }
  return s_array;
}