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IAR Embedded Workbench for Arm 9.70.x

Introduction to multicore debugging

In this section:

Briefly about multicore debugging

Multicore debugging means that you can debug targets with multiple cores. The C-SPY debugger supports multicore debugging in two ways:

  • Symmetric multicore debugging (SMP), which means debugging two or more identical cores that run the same application. This is handled using a single instance of the IAR Embedded Workbench IDE.

  • Asymmetric multicore debugging (AMP), which means debugging two or more cores that run separate applications. This is handled using two or more cooperating instances of the IAR Embedded Workbench IDE, where each instance is connected to one or more identical cores.

Symmetric multicore debugging

Symmetric multicore debugging means that the target has two or more identical cores that run the same application. The cores can typically be accessed through a single debug probe.

In the debugger, at any given time the windows show the state of only one of the cores—the one in focus.

This is an overview of special support for symmetric multicore debugging:

  • You can control whether to automatically start and stop the whole application or to run the cores independently of each other.

  • You can also control which core you want the debugger to focus on. This affects editor windows and the Disassembly, Registers, Watch, Locals, Call Stack window, etc.

  • The Cores window shows a list of all available cores, and gives some information about each core, such as its execution state. The Multicore toolbar is a complement to the Cores window,

  • The Stack window can show the stack for each core by means of dedicated stack sections.

  • RTOS support is available in separate multicore-aware plugins, Typically, they work like their single-core plugin counterparts, but handle multiple active tasks on separate cores. The plugins might also provide the information required by the Stack window to display the stack for any selected task.

Asymmetric multicore debugging

Asymmetric multicore means that the target has two or more cores that run separate applications. To debug the target, two or more IDE instances can be used, where each instance is connected to one or more identical cores. The IDE instances synchronize so that debugging sessions can be started and stopped, and the cores can be controlled from any of the instances. Except for shared memory, each debugging session can only show information (variables, call stack, etc) about its own cores.

You start one IDE instance manually and that instance is referred to as the master. When you start an asymmetric multicore debugging session, the master instance can initiate one or more partner (or slave) instances. The partner instances will be reused if they are already running.

All instances each require their own project, master and partners. You must set up each project with the correct processor variant, linker, and debugger options. The master project must also be configured to act as multicore master or have multicore master mode enabled.

One possible strategy for download is to combine the debug images for the cores into one and let the master project download the combined image. In this scenario, the partners must be configured to attach to a running target, and/or to suppress any downloading.

Another strategy is to download the master and partners as separate binary images, in which case you must make sure to avoid any unintentional overlaps in memory.

This is an overview of special support for asymmetric multicore debugging:

  • You can control whether to automatically start and stop the whole application or to run the cores independently of each other.

  • Each instance of the IDE displays debug information for the cores that it is connected to.

  • The Cores window shows a list of all available cores, and gives some information about each core, such as its execution state. The Multicore toolbar is a complement to the Cores window,

  • When you set a breakpoint, it is only connected to one core, and when the breakpoint is triggered, that core is stopped.

Requirements and restrictions for multicore debugging

The C-SPY simulator supports multicore debugging for most cores and devices. If supported, there are no further specific requirements or restrictions.

To use multicore debugging in your hardware debugger system, you need a specific combination of C-SPY driver and debug probe:

  • The IAR C-SPY I-jet driver

  • The IAR C-SPY CMSIS-DAP driver

  • The IAR C-SPY J-Link/J-Trace driver (asymmetric multicore)

Note

There might be restrictions in trace support due to limitations in the hardware you are using.