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IAR Embedded Workbench for Arm 9.70.x

Warning messages

In this section:

Unless the option -j is specified, the assembler will issue warning messages when the alternative names are used, or when illegal combinations of operands are encountered. The following sections list the warning messages:

The first register operand omitted

The first register operand was missing in an instruction that requires three operands, where the first two are unindexed registers (ADD, SUB, LSL, LSR, and ASR).

The first register operand duplicated

The first register operand was a register that was included in the operation, and was also a destination register.

Example of incorrect code:

MUL R0, R0, R1

Example of correct code:

MUL R0, R1

Immediate #0 omitted in Load/Store

Immediate #0 was missing in a load/store instruction.

Example of incorrect code:

LDR R0,[R1]

Example of correct code:

LDR R0,[R1,#0]