Skip to main content

IAR Embedded Workbench for RH850 3.20.x

Programming multicore microcontrollers

In this section:

Programming for a multicore microcontroller requires some extra considerations:

  • Configuring the shared RAM, see Shared RAM areas.

  • Specifying separate interrupt service routines, see #pragma core.

  • Linker sections for multicore support, see the chapter Section reference.

For information about debugging a multicore microcontroller, see the C-SPY Debugging documentation.

Adapting the system initialization for multiple cores

In the file containing the startup code (cstartup), all cores initialize their own system registers and the variables located in their own local RAM. Core 1 (PE1) will also initialize all global RAM areas and the C++ constructors, while the other cores wait for it to complete. The synchronization is handled by using the Exclusive Control Register 0 (G0MEV0) as a semaphore. Alternatively, each core can handle its own low-level initialization in the routine __low_level_init, which is called from cstartup with a parameter that specifies which CPU core that is calling it.

For more information about system initialization, see System initialization.