The IAR C-SPY Simulator
The C-SPY simulator simulates the functions of the target processor entirely in software, which means that you can debug the program logic long before any hardware is available. Because no hardware is required, it is also the most cost-effective solution for many applications.
Supported features
The C-SPY simulator supports:
Instruction-level simulation
Memory configuration and validation
Interrupt simulation
Peripheral simulation (using the C-SPY macro system in conjunction with immediate breakpoints).
Simulating hardware instead of using a hardware debugging system means that some limitations do not apply, but that there are other limitations instead. For example:
You can set an unlimited number of breakpoints in the simulator.
When you stop executing your application, time actually stops in the simulator. When you stop application execution on a hardware debugging system, there might still be activities in the system. For example, peripheral units might still be active and reading from or writing to SFR ports.
Application execution is significantly much slower in a simulator compared to when using a hardware debugging system. However, during a debug session, this might not necessarily be a problem.
The simulator is not cycle accurate.
Peripheral simulation is limited in the C-SPY Simulator and therefore the simulator is suitable mostly for debugging code that does not interact too much with peripheral units.